Moves a value to/from the control registers from/to the general-purpose registers Low-power doze mode, awakened by interrupt Table 31.3 describes various exception codes and/or privileged instructions that one could implement. The most noticeable effect of offering more than one trap vector is to reduce the register file pressure in handling system calls, which may be important in architectures with small instruction footprints and thus small register files. Most architectures implement only one vector: all system calls are vectored through the same exception, and the user code first places the trap type into a user-visible register or known memory location for the operating system to read once the handler runs. ![]() ![]() Each of the trap vectors is operating-system defined (e.g., TRAP 1 can mean read or write or open or close …) the hardware simply vectors to the corresponding handler, so the operating system can attach arbitrary semantics to each of the trap handlers. Trap instructions implement various operating system routines, because the trap type is interpreted by the hardware to indicate a particular vector, just like each exception and interrupt type has a separate vector. Another type of exception (another class of internally generated exceptional condition) is a trap or syscall. Following Motorola's terminology, we will distinguish two classes of exceptional conditions: those stemming from internal actions (exceptions) and those stemming from external actions (interrupts).
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